Kahaner Report: Hitachi's parallel processing plans

[David Farber <farber () central cis upenn edu>]

From:
 Dr. David K. Kahaner
 US Office of Naval Research Asia
 (From outside US):  23-17, 7-chome, Roppongi, Minato-ku, Tokyo 106 Japan
 (From within  US):  Unit 45002, APO AP 96337-0007
  Tel: +81 3 3401-8924, Fax: +81 3 3403-9670
  Email: kahaner () cs titech ac jp
Re: Hitachi's parallel processing plans
04/14/94 (MM/DD/YY)
This file is named "hitachi.pp"


ABSTRACT. Announced plans from Hitachi concerning parallel computing,
including a 300GFLOP 1000 PA-RISC system.


In previous reports of mine as early as one year ago, see "cp-pacs.93"
21 May 1993 and more recently, see "j-hpc.93 8 Dec 1993, as well as
"cp-pacs.94" 12 March 1994, I described work at Tsukuba University to
develop, jointly with Hitachi, a massively parallel computer with
performance in the range of 300GFLOPs, based on 1000-1500 PA-RISC
processors.  This machine was developed to be of primary use to and meet
the needs of the computational physics community, but I suggested that,
based on the design, it would be natural for Hitachi to commercialize
this as a way of getting into the MPP field for which they have not been
a player. I have also commented several times that Hitachi has very
excellent technology, which can often be used to jump from a trailing to
a leading position.


Apparently, Hitachi has decided that this is the approach that they will
take to an MPP product. In today's (14 April 1994), Nikkan Kogyo
Shimbun, the Japanese high tech newsweekly, there is an article
describing Hitachi's announcement. Below is a rough translation, cleaned
up to convey the essential meaning.


Hitachi will market a massively parallel computer with a very high level
of performance by using over 1000 general purpose RISC processors, in
mid 1997. This is to meet the needs for high speed processing in the
fields of science and technology. Compared to conventional [shared
memory] supercomputers, price performance will be much improved by the
use of general purpose RISC processors. Peak performance will be about
300GFLOPs by the use of over 1000 processors. In the massively parallel
processor field, Cray Research and Thinking Machines are leading (sic),
and Fujitsu and NEC are following after them. By Hitachi entering this
field, the market will become very competitive.


Hitachi's new MPP uses over 1000 HP PA-RISC processors, and will be
about 10 times faster than Hitachi's conventional S-3000 series
supercomputer [S-3800 has peak performance of 32 GFLOPs with 4
processors]. It is being developed as a joint research project with
Tsukuba University [Center for Computational Physics].  Processors will
use the concept of a sliding register window for improved efficiency
[see the report mentioned above, "cp-pacs.94" and the paper presented
last summer that is referenced there].  Hitachi also plans to develop a
large scale system with up to 4000 processors [this would be a TFLOP
machine].


Hitachi also plans to market a small style PC with 128 PA-RISC
processors at the same time. It may be possible to introduce this to the
market before the MPP, depending on market trends.


Hitachi also plans to market a general purpose machine with 128
integrated single-chip CMOS processors compatible with their M-series
mainframes at the same time that the MPP will be marketed.


Hitachi plans to hurry its expansion of parallel computer products in
both business and science and technology fields.


[Readers may compare the similarities in this situation with Fujitsu's
collaborations with the National Aerospace Lab, which lead to the
development of their VPP500.]


-----------------------------END OF REPORT--------------------------------