Re: Vyatta as a BRAS

[Mikael Abrahamsson <swmike () swm pp se>]

On Tue, 13 Jul 2010, Lamar Owen wrote:

> Instruction issue?  Execution unit?  Special instructions?  Sounds like 
> a software-driven processor to me.  Specialized software instruction 
> set, yes.  True hardware forwarding, no software involvement?  No. 
> More like asymmetrical multiprocessing software routing.  Call it 
> hardware accelerated if you like; PXF is to networking as a nVidia 
> GeForce GPU is to graphics.

This is true on a lot of newer Cisco high end platforms. CRS-1 uses 
multicore processors (hundreds of cores) for forwarding on their 
linecards, and they achieve 40+ Mpps per linecard.

This is the trend in networking where you need to do intelligent things, 
it's easier to do multicore parallell processing than doing hugely fast 
FPGA forwarding (at least it seems that way, and it's faster to upgrade 
the software on a CPU than on a FPGA).

The lines are blurring between CPU/FPA/ASIC (well, ASIC is really a 
misnomer as it's just "application specific" which means packaging, not 
function) and since people want flexibility, general CPUs used for 
forwarding is the way it's headed, even though the CPUs right now have 
little to do with the CPUs we see in "normal" PCs.

--
Mikael Abrahamsson    email: swmike () swm pp se